2.13 - Hardware Revision Notes [U3 Datasheet]

The U3 has undergone three hardware revisions.

U3A = Hardware Version 1.20

U3B = Hardware Version 1.21

U3C = Hardware Version 1.30

How to Determine Hardware Version:

Displayed by LJControlPanel.
Returned through the UD library using IOType LJ_ioGET_CONFIG with special channel LJ_chHARDWARE_VERSION.
Returned by the Low-level ConfigU3 function.
Printed on the serial number label on the bottom of the red enclosure.

Changes from 1.20 to 1.21:

Starting September of 2006, all U3 shipments changed from hardware revision 1.20 to 1.21. Following are the some of the main changes in revision 1.21:

The default timer clock frequency is 48 MHz.
All TimerBaseClock frequencies are twice the previous frequencies.
The input timer edge limit is now 30,000 edges/second, compared to the old limit of 10,000 edges/second.
Stream mode is now supported. See Section 3.2.
Other new functions are supported, including Watchdog, SPI, Asynch, I2C, and SHT1X.
Typical supply current is 50 mA.

Changes from 1.21 to 1.30:

Hardware revision 1.30 was released in mid-March 2008 with 2 variations: U3-LV and U3-HV. The U3-LV is the most compatible with the previous U3, and the only changes possibly affecting backwards compatibility are:

Timers/Counters cannot appear on FIO0-3. TimerCounterPinOffset must be 4-8. A value of 0-3 will result in an error. This error can be suppressed by a power-up default setting in LJControlPanel. If suppressed, a 0-3 will result in an offset of 4.
The 3.66 reference voltage is no longer available on the REF/DAC1 terminal.
There is no longer a buzzer.
SDA terminal is gone. SCL terminal changed to SPC.
UART (Asynch functionality) no longer uses SDA and SPC terminals, but rather uses terminals dynamically assigned after timers and counters. Also, the BaudFactor is different.

Other changes:

Analog outputs are now specified for 10-bit resolution and DAC1 is always enabled. The higher resolution is available with a new IOType in the low-level Feedback function, which the high-level UD driver uses automatically. This causes the DACs to have more noise when the timer clock is decreased from the default of 48 MHz, so there is a compatibility option available in LJControlPanel to use 8-bit DACs.
On the U3-HV only, the first four flexible I/O are fixed as analog inputs (AIN0-AIN3), and have scaling such that the input range is ±10 volts normally, and +20 to -10 volts when using the “Special” range. The input impedance of these four lines is roughly 1 MΩ, which is good, but less than the normal low voltage analog inputs. Analog/digital configuration and all other digital operations on these pins are ignored. FIO4-EIO7 are still available as flexible I/O, same as the U3-LV.
Timer and counter settings can be saved to startup defaults.

Revision 1.20/21 U3s cannot be upgraded to 1.30.