ConfigTimerClock (U3 and U6 Only)
Writes and read the timer clock configuration.
Command: |
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Byte |
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0 | Checksum8 |
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1 | 0xF8 |
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2 | 0x02 |
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3 | 0x0A |
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4 | Checksum16 (LSB) |
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5 | Checksum16 (MSB) |
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6 | Reserved |
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7 | Reserved |
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8 | TimerClockConfig |
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| Bit 7: Configure the clock | |
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| Bits 2-0: TimerClockBase | |
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| b000: 4 MHz |
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| b001: 12 MHz |
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| b010: 48 MHz (Default) |
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| b011: 1 MHz /Divisor |
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| b100: 4 MHz /Divisor |
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| b101: 12 MHz /Divisor |
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| b110: 48 MHz /Divisor |
9 | TimerClockDivisor ( 0 = ÷256 ) |
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Response: |
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Byte |
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0 | Checksum8 |
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1 | 0xF8 |
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2 | 0x02 |
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3 | 0x0A |
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4 | Checksum16 (LSB) |
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5 | Checksum16 (MSB) |
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6 | Errorcode |
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7 | Reserved |
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8 | TimerClockConfig |
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9 | TimerClockDivisor ( 0 = ÷256 ) |
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TimerClockConfig: Bit 7 determines whether the new TimerClockBase and TimerClockDivisor are written, or if just a read is performed. Bits 0-2 specify the TimerClockBase. If TimerClockBase is 3-6, then Counter0 is not available.
TimerClockDivisor: The base timer clock is divided by this value, or divided by 256 if this value is 0. Only applies if TimerClockBase is 3-6.