Outputs a pulse width modulated rectangular wave output. Value passed should be 0-65535, and determines what portion of the total time is spent low (out of 65536 total increments). The lower byte is actually ignored since this is 8-bit PWM. That means the duty cycle can be varied from 100% (0 out of 65536 are low) to 0.4% (65280 out of 65536 are low).
The overall frequency of the PWM output is the clock frequency specified by the following formula:
frequency = TimerClockBase/(TimerClockDivisor*256)
The following table shows the range of available PWM frequencies based on timer clock settings.
Table 2.9.1.2-1. 8-bit PWM Frequency Ranges
|
TimerClockBase |
|
Divisor=1 |
Divisor=256 |
|---|---|---|---|
|
0 |
4 MHz |
15625 |
N/A |
|
1 |
12 MHz |
46875 |
N/A |
|
2 |
48 MHz (Default) |
187500 |
N/A |
|
3 |
1 MHz /Divisor |
3906.25 |
15.259 |
|
4 |
4 MHz /Divisor |
15625 |
61.035 |
|
5 |
12 MHz /Divisor |
46875 |
183.105 |
|
6 |
48 MHz /Divisor |
187500 |
732.422 |
The same clock applies to all timers, so all 8-bit PWM channels will have the same frequency and will have their falling edges at the same time.
PWM output starts by setting the digital line to output-low for the specified amount of time. The output does not necessarily start instantly, but rather has to wait for the internal clock to roll. For 8-bit PWM output, the start delay varies from 0.0 to TimerClockDivisor*256/TimerClockBase. For example, if TimerClockBase = 48 MHz and TimerClockDivisor = 256, PWM frequency is 732 Hz, PWM period is 1.4 ms, and the start delay will vary from 0 to 1.4 ms.
If a duty cycle of 0.0% (totally off) is required, consider using a simple inverter IC such as the CD74ACT540E from TI. Or you can switch the mode of the timer to some input mode, and add an external pull-down to hold the line low when set to input.