2.9.1.5 - Firmware Counter Input (Mode 5) [U3 Datasheet]

On every rising edge seen by the external pin, this mode increments a 32-bit register. Unlike the pure hardware counters, these timer counters require that the firmware jump to an interrupt service routine on each edge.

Writing a value of zero to the timer performs a reset. After reset, a read of the timer value will return zero until a new edge is detected. If a timer is reset and read in the same function call, the read returns the value just before the reset.

Edge Rate Limits

This edge-detecting timer mode requires processing resources as an interrupt is required to handle each edge.  See more about edge rate limits in Section 2.9.2.