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2.9 - Timers/Counters [U3 Datasheet]

The U3 has 2 timers (Timer0-Timer1) and 2 counters (Counter0-Counter1).


When any of these timers or counters are enabled, they take over an FIO/EIO line in sequence (Timer0, Timer1, Counter0, then Counter1), starting with FIO0+TimerCounterPinOffset. Some examples:

1 Timer enabled, Counter0 disabled, Counter1 disabled, and TimerCounterPinOffset=4:

1 Timer enabled, Counter0 disabled, Counter1 enabled, and TimerCounterPinOffset=6:

2 Timers enabled, Counter0 enabled, Counter1 enabled, and TimerCounterPinOffset=8:

Starting with hardware revision 1.30, timers/counters cannot appear on FIO0-3, and thus TimerCounterPinOffset must be 4-8. A value of 0-3 will result in an error. This error can be suppressed by a power-up default setting in LJControlPanel. If suppressed, a 0-3 will result in an offset of 4.

Timers and counters can appear on various pins, but other I/O lines never move. For example, Timer1 can appear anywhere from FIO4 to EIO1, depending on TimerCounterPinOffset and whether Timer0 is enabled. On the other hand, FIO5 (for example), is always on the screw terminal labeled FIO5, and AIN5 (if enabled) is always on that same screw terminal.

Applicable digital I/O are automatically configured as input or output as needed when timers and counters are enabled, and stay that way when the timers/counters are disabled.

Timers and counters use digital I/O hardware so the digital I/O specs from Appendix A apply.  An input recognizes 0.0-0.8V as low and 2.0-5.8V as high, so rising and falling edges must transition between those levels.  For more information about signal connections see our Digital I/O application notes.

There are special channels numbers that can be used to read timer and counter values.  These channel numbers can be used most places where you would use analog input channel numbers, such as LJLogUD and LJStreamUD.  See Section 3.2.1 for more information.


The timers (Timer0-Timer1) have various modes available.  These are listed in the following table and more details can be found in Section 2.9.1.

Table 2.9-1. U3 Timer Modes

Index (Low-level & UD) 


16-bit PWM output


8-bit PWM output


Period input (32-bit, rising edges)


Period input (32-bit, falling edges)


Duty cycle input


Firmware counter input


Firmware counter input (with debounce)


Frequency output


Quadrature input


Timer stop input (odd timers only)


System timer low read (Default mode)


System timer high read


Period input (16-bit, rising edges)


Period input (16-bit, falling edges)


Line-to-Line input

Both timers use the same timer clock.  There are 7 choices for the timer clock base:

Table 2.9-2. U3 Timer Clock Base Options

Index (Low-level/UD) 


4 MHz


12 MHz


48 MHz (Default)


1 MHz /Divisor


4 MHz /Divisor


12 MHz /Divisor


48 MHz /Divisor

Note that these clocks apply to the U3 hardware revision 1.21+. With hardware revision 1.20 all clocks are half of the values above.

The first 3 clocks have a fixed frequency, and are not affected by TimerClockDivisor. The frequency of the last 4 clocks can be further adjusted by TimerClockDivisor, but when using these clocks Counter0 is not available. When Counter0 is not available, it does not use an external FIO/EIO pin. The divisor has a range of 0-255, where 0 corresponds to a division of 256.

Note that the DACs (Section 2.7) are derived from PWM signals that are affected by the timer clock frequency. The default timer clock frequency of the U3 is set to 48 MHz, as this results in the minimum DAC output noise. If the frequency is lowered, the DACs will have more noise, where the frequency of the noise is the timer clock frequency divided by 216.


Each counter (Counter0 or Counter1) consists of a 32-bit register that accumulates the number of falling edges detected on the external pin. If a counter is reset and read in the same function call, the read returns the value just before the reset.

Although the timer clock frequency does not affect counters, note that Counter0 is not available with certain timer clock base frequencies (those that support a divisor). In such a case, it does not use an external FIO/EIO pin. An error will result if an attempt is made to enable Counter0 when one of these frequencies is configured. Similarly, an error will result if an attempt is made to configure one of these frequencies when Counter0 is enabled.


Usage for all timers & counters is pretty much the same.  First you configure, then you read and/or write.  The effect of the parameters can vary depending on timer mode, so see the timer mode descriptions for more details.

Test using the Test panel in LJControlPanel

Before attempting to use LJLogUD or your own software, first test in LJControlPanel as described in our configuring counters and configuring timers tutorials and confirm the results are as expected.


To configure counters, write to the following:

To configure timers, write to the following:

There are 2 basic ways to configure:

1. Configure the power-up defaults of device as desired, then power cycle the device.  On Windows this can be done using the Config Defaults screen in LJControlPanel.

2. Configure at the start of your program.  For the Windows UD library see our Configuration and Timers & Counters pseudocode pages.  Find any timer example for your programming language and it should demonstrate writes to the above parameters.

Read & Write

Depending on the timer/counter, you might want to do reads of TimerValue or do updates of TimerValue.

Programming Guidance

See our Configuration and Timers & Counters pseudocode pages for programming guidance.

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