2.10.1.1 - PWM Output (16-Bit, Mode 0) [UE9 Datasheet]

Outputs a pulse width modulated rectangular wave output. Value passed should be 0-65535, and determines what portion of the total time is spent low (out of 65536 total increments). That means the duty cycle can be varied from 100% (0 out of 65536 are low) to 0.0015% (65535 out of 65536 are low).

The overall frequency of the PWM output is the clock frequency specified by TimerClockBase/TimerClockDivisor divided by 2¹⁶. The following table shows the range of available PWM frequencies based on timer clock settings.

Table 2.10.1.1-1. 16-bit PWN Frequency Ranges

The same clock applies to all timers, so all 16-bit PWM channels will have the same frequency and will have their falling edges at the same time.

PWM output starts by setting the digital line to output-low for the specified amount of time. The output does not necessarily start instantly, but rather has to wait for the internal clock to roll. For 16-bit PWM output, the start delay varies from 0.0 to TimerClockDivisor*65536/TimerClockBase. For example, if TimerClockBase = 48 MHz and TimerClockDivisor = 1, PWM frequency is 732 Hz, PWM period is 1.4 ms, and the start delay will vary from 0 to 1.4 ms.

If a duty cycle of 0.0% (totally off) is required, consider using a simple inverter IC such as the CD74ACT540E from TI.